Increasing demands for densification and performance of semiconductor devices require increasing miniaturization of semiconductor devices with submicron circuitry. Conventionally, semiconductor devices with submicron circuitry are fabricated by methods which comprise forming a contact hole in an interlayer insulation layer and filling the contact hole with an electrically conductive material for electrically connecting conductors at different levels, such as impurity diffusion regions formed at the surface of a semiconductor substrate, for example, source and drain regions of MOS transistors, with interconnection layers, and lower and upper interconnection layers with each other. The contact hole is filled with a conductive material, such as a metal, e.g., tungsten, formed as a buried plug in the contact hole. These metal plugs electrically connect an impurity diffusion region formed at the surface of the semiconductor substrate and an interconnection layer, or upper and lower interconnections. However, increasing miniaturization requires contact holes with increasingly high aspect ratios. As employed throughout the present disclosure, including the specification and claims, the expression "aspect ratio" denotes the ratio of the height of a contact hole to the opening diameter of the contact hole.
A method of manufacturing a semiconductor device comprising a contact hole filled with a metal plug to electrically connect an impurity diffusion region formed at the surface of a semiconductor substrate with an interconnection layer is described with respect to FIGS. 11 to 15. As shown in FIG. 11, an interlayer insulation layer 53 is formed on the surface of a semiconductor substrate 51 made of silicon formed with an impurity diffusion region 52 a portion of which forms contact region 52a. A contact hole 54 is formed in the interlayer insulation layer 53 above and exposing contact region 52a.
As shown in FIG. 12, sputtering is conducted in an argon gas atmosphere, employing a sputtering device equipped with a titanium target to form a titanium layer 55 on the entire surface of the semiconductor substrate 51, i.e., on the surface of the interlayer insulation layer 53 and on the contact region 52a located within a contact hole 54 in the interlayer insulation layer 53. A titanium nitride layer 56 is then formed on the entire surface of the semiconductor substrate 51, i.e., titanium layer 55, by reaction sputtering, employing a sputtering device equipped with a titanium target in a nitriding atmosphere, such as nitrogen or a mixture of nitrogen and argon.
As shown in FIG. 13, heat-treatment is conducted to convert the portion of titanium layer 55 in contact with contact region 52a into titanium silicide layer 57, which encroaches into impurity diffusion region 52. The bilayer structure thus fabricated, composed of titanium silicide layer 57 and titanium nitride layer 56, forms a barrier metal layer.
As shown in FIG. 14, tungsten layer 58 is then formed by a blanket chemical vapor deposition (CVD) method, as by depositing WF.sub.6 gas on the entire surface of the semiconductor substrate 51, i.e., titanium nitride layer 56. Tungsten layer 58 is then etched back to leave a portion of tungsten layer 58 only in the contact region 52a, thereby forming a tungsten plug 59 as shown in FIG. 15. As also shown in FIG. 15, an aluminum layer is then formed on the entire surface of the semiconductor substrate 51, i.e., on the entire exposed surface of titanium nitride layer 56 and the surface of tungsten plug 59. The aluminum layer is etched employing conventional photolithographic techniques, thereby forming an interconnection portion 60.
Titanium layer 55 and titanium nitride layer 56 situated under the aluminum layer are also etched and removed, except for a portion or portions located below interconnection 60. The formed interconnection layer comprises interconnection portion 60 and tungsten plug 59. Impurity diffusion region 52 formed on the surface of semiconductor substrate 51, and interconnection layer comprising interconnection portion 60 and tungsten plug 59 are thus electrically connected to each other through the barrier metal layer 62 comprising titanium silicide layer 57 and titanium nitride layer 56.
In the above-described semiconductor device, since titanium is active, titanium layer 55 reduces the natural oxide film existing on the contact region 52a and forms titanium silicide layer 57 by reaction with silicon in the impurity diffusion region 52 during heat-treatment of the titanium layer 55, thereby forming a low resistance electrical connection between the impurity diffusion region 52 and the interconnection layer. Upon forming tungsten plug 59 directly on the surface of the titanium layer 55, peeling-off may occur. In addition, formation of tungsten layer 58 may be difficult due to reaction between WF.sub.6 gas employed as a source gas for forming tungsten layer 58 and titanium layer 55. Accordingly, titanium nitride layer 56 functions as an adhesive layer between titanium layer 55 and tungsten 58.
Titanium nitride layer 56 also prevents the occurrence of warm holes at impurity diffusion region 52 when tungsten layer 58 is formed by blanket CVD employing WF.sub.6 gas. A warm hole is a generally beard-shaped area of tungsten extending from the surface of the impurity diffusion region 52 to within semiconductor substrate 51, produced by reaction of WF.sub.6 gas and silicon in the impurity diffusion region 52. The warm hole, if extending to the boundary between the impurity diffusion region 52 and the semiconductor substrate 51, or around a face of a PN junction, induces junction defects.
Upon fabricating a semiconductor device in the manner previously discussed with respect to FIGS. 11 through 15, and upon various examinations and extensive experimentation, we discovered several problems. Upon scaling down semiconductor devices fabricated in the above-discussed conventional manner, the aspect ratio of contact hole 54 of the interlayer insulation layer 53 was made increasingly higher to increase miniaturization. We found, however, that when the aspect ratio was made 2.5 or higher, (which is 0.6 .mu.m or below in diameter of contact hole 54), the thickness of the film coverage at the bottom of the contact hole 54 shown in FIG. 12, i.e., the thickness of titanium film 55 and titanium nitride film 56 formed on contact region 52a of impurity diffusion region 52, become very thin, rendering it difficult to form a low resistance connection between tungsten plug 59 shown in FIG. 15 of the interconnection layer and impurity diffusion region 52, so that warm holes occurred as shown by reference numeral 11 in FIGS. 14 and 15. As the thickness of titanium film 55 and titanium nitride film 56 formed at the bottom of contact hole 54 shown in FIG. 12 becomes very thin, bottom coverage (the ratio of the thickness of a film located at the bottom of the contact hole 54 to the thickness of the film located at a flat portion) decreases as the aspect ratio of the contact hole 54 increases, as shown by a dotted line A in FIG. 17. If the aspect ratio of contact hole 54 is 2.5, the bottom coverage becomes 0.05 (5%) or below.
Specifically, where the aspect ratio is 3, in which the diameter and depth of contact hole 54 shown in FIG. 12 are 0.5 .mu.m and 1.5 .mu.m, respectively, and where titanium layer 55 and titanium nitride layer 56 have a thickness of about 200 .ANG. and about 1,000 .ANG., respectively, on the surface of the interlayer insulation layer 53 (flat portion), the thicknesses of titanium layer 55 and titanium nitride layer 56 formed at the bottom of contact hole 54 were very thin, i.e., about 4 .ANG. and about 20 .ANG., respectively, the bottom coverage was about 2%, rendering it difficult to form a low resistance connection between tungsten plug 59 of the interconnection layer and the impurity diffusion region 52, resulting in the occurrence of warm holes 11 as shown in FIGS. 14 and 15.
A prior approach for improving bottom coverage during formation of titanium layer 55 and titanium nitride layer 56 comprises a collimation sputtering technique. See, for example, Proc. VMIC Conference, p.p. 253 to 259 "COLLIMATED SPUTTERING OF TiN/Ti LINES INTO SUB-HALF MICRON HIGH ASPECT RATIO CONTACT/LINES". We manufactured various semiconductor devices employing a collimation sputtering device as shown in FIG. 16, and conducted extensive examinations of the resulting semiconductor devices.
As shown in FIG. 16, the inside of an apparatus body 100 is filled with an argon atmosphere when titanium layer 55, described in FIG. 12, is to be formed, and with a mixture of nitrogen and argon when titanium nitride layer 56, described similarly in FIG. 12, is to be formed. A heat stage 101 is attached at the inside of the apparatus body, and a wafer 102 for forming plural semiconductor devices is positioned on top of heat stage 101. A wafer clamp 103 is employed to fix wafer 102 onto heat stage 101. A titanium target 104 is provided over heat stage 101 inside the apparatus body 100. A collimator 105, typically in the form of a plate with plural honeycomb holes, is positioned between heat stage 101 and titanium target 104. A seal 106 is provided inside apparatus body 100 surrounding part of heat stage 101, wafer clamp 103, the titanium target 104, and collimator 105.
In employing the collimation sputtering apparatus described above with respect to FIG. 16 to form titanium layer 55, wafer 102, containing semiconductor devices completed up to the state shown in FIG. 11, is positioned on the surface of heat stage 101 and fixed thereto by wafer clamp 103. Wafer 102 is then heated by the heat stage 101. Meanwhile, argon gas is introduced into the apparatus body 100 to provide an argon gas atmosphere. Power is then supplied to titanium target 104 and sputtering particles of titanium are discharged from titanium target 104 and impinge on wafer 102, after removal of a large amount of oblique components by the collimator 105, thereby forming titanium layer 55 on the surface of interlayer insulation layer 53, on contact region 52a of impurity diffusion region 52 over which contact hole 54 in the interlayer insulation layer 53 is located, and on the exposed surfaces of interlayer insulation layer 53 in contact hole 54.
To form titanium nitride layer 56 on titanium layer 55, the power for titanium target 104 is turned off, and nitrogen gas introduced inside apparatus body 100 together with argon gas, thereby filling the inside of apparatus body 100 with a mixture of argon and nitrogen gases. Power is then supplied to titanium target 104 whereby sputtering particles of titanium are discharged from the titanium target 104 and are converted to sputtering particles of titanium nitride by reaction with nitrogen in the gas mixture. The sputtering particles of titanium nitride impinge upon wafer 102 after removal of a large amount of oblique components by collimator 105, thereby forming titanium nitride layer 56 on the entire surface of titanium layer 55, as shown in FIG. 12.
After extensive investigation, we found that a relationship existed between the bottom coverage and the aspect ratio of the contact hole 54. Adverting to FIG. 17, solid line B indicates the bottom coverage versus aspect ratio of contact hole 54 where the aspect ratio of collimator 105 (ratio of height versus hole diameter formed at the collimator 105) is 0.5; solid line C indicates the bottom coverage versus aspect ratio of contact hole 54 where the aspect ratio of collimator 105 is 1.0; solid line D indicates the bottom coverage versus aspect ratio of contact hole 54 and where the aspect ratio of collimator 105 is 1.5; and solid line E indicates the bottom coverage versus aspect ratio of contact hole 54 where the aspect ratio of collimator 105 is 2.0.
As apparent from FIG. 17, formation of titanium layer 55 and titanium nitride layer 56 by collimation sputtering improves bottom coverage in comparison with sputtering without a collimator. For example, where the aspect ratio of the collimator 105 is 1.5 (diameter and height of the hole are 2 cm and 3 cm, respectively), the bottom coverage will be about four times better.
We have, however, observed that upon forming titanium layer 55 and titanium nitride layer 56 by collimation sputtering, certain problems arose. It was initially found that the film formation speed of titanium layer 55 and titanium nitride layer 56 was dramatically reduced in comparison with that obtained by sputtering without a collimator, with an attendant reduction in treatment capacity. For example, it was found that when employing a collimator 105 with an aspect ratio of 1.5 (diameter and height of the hole are 2 cm and 3 cm, respectively), the film formation speed was lowered by 1/4 to 1/5. This reduction in film formation is due to the reduction in the amount of sputtered particles reaching wafer 102, because of the large amount of oblique components removed by collimator 105 from the sputtering particles discharged from titanium target 104.
Secondly, we also found that titanium nitride attached to the collimator 105 peeled off during formation of titanium layer 55 and titanium nitride layer 56, and fell onto wafer 102. Thus, the collimator becomes a source of particles 108. In practice, a single collimator 105 is employed to treat several hundred wafers, during which titanium and titanium nitride, having a thickness of tens of .mu.m or more, becomes attached to the collimator. Since titanium nitride is chemically stable and stressed, its adhesive force is relatively weak and, hence, it is easily peeled off the collimator. Though the titanium has less stress and can function as an adhesive, it cannot prevent titanium nitride from peeling off because the sputtered amount of titanium is significantly less than the sputtered amount of titanium nitride. For example, for a collimator having an aspect ratio of 1.5 (diameter and height of the hole are 2 cm and 3 cm, respectively), particles 108 increased several times after tens of wafers were treated.
A third problem we encountered is a reduction in the vacuum efficiency as wafers 102 are treated, thereby increasing the time required for sputtering particles of titanium from titanium target 104. It is believed that this problem is caused by increasing amounts of titanium nitride attaching to the collimator 105 and by an attendant release of increasing amounts of nitrogen gas from the attached titanium nitride.
In an attempt to solve the second and third problems, a so-called cleaning period was established in which, as shown in FIG. 16, a shutter 109 was installed between collimator 105 and wafer 102, after titanium nitride layer 56 is formed, and shut while sputtering particles of titanium are discharged from the titanium target 104. Since active titanium functions as an adhesive, it prevents the attached titanium nitride from peeling off collimator 105, thereby avoiding the formation of particles 108. Moreover, titanium is attached so as to cover the attached titanium nitride on the collimator 105, thereby preventing outgassing of nitrogen from the attached titanium nitride. In addition, the attached titanium improves evacuation by absorbing nitrogen. Therefore, the second and third problems can be addressed as in the specific example represented in FIG. 18, wherein titanium layer 55 and titanium nitride layer 56, as shown in FIG. 12, are formed using a collimation sputtering apparatus with a shutter 109. Specifically, where the aspect ratio of the contact hole is 3, in which the diameter and depth of the contact hole 54 are 0.5 .mu.m and 1.5 .mu.m, respectively, a titanium layer 55 having thickness of about 200 .ANG. and a titanium nitride layer 56 having thickness of about 700 .ANG. are formed on the surface, or a flat portion, of interlayer insulation layer 53 employing collimator 105 having an aspect ratio of 1.5 (diameter and height of the hole are 2 cm and 3 cm, respectively).
As shown in FIG. 16, wafer 102 comprising a semiconductor device completed up to the state shown in FIG. 11, is mounted on the surface of heat stage 101 and secured thereto with wafer clamp 103. The wafer 102 is heated by heat stage 101 and the inside of apparatus body 100 is evacuated. At this stage, step S51 in FIG. 18 starts and argon gas is introduced into the apparatus body 100 to provide an argon gas atmosphere. At step S52, power is supplied to titanium target 104 while the shutter is open, or while no shutter exists between the titanium target 104 and the wafer 102. It should be noted that it takes about 15 seconds from the start of step S51 until the flow rate of the argon gas into the inside of the apparatus body 100 becomes stable, and that argon gas continues to be introduced while power is supplied to the titanium target 104 and titanium layer 56 is being formed.
Titanium target 104 discharges sputtering particles of titanium. After a large amount of oblique components are removed by the collimator 105, the discharged particles impinge on the wafer 102, thereby forming titanium layer 55 on the surface of interlayer insulation layer 53, on contact region 52a of the impurity diffusion region 52 at which contact hole 54 in interlayer insulation layer 53 is located, and on the exposed surface side of interlayer insulation layer 53 in contact hole 54. In about 30 seconds, titanium layer 55 having a thickness of about 200 .ANG. is formed on the surface of interlayer insulation layer 53, or a flat portion, and having a thickness of about 30 .ANG. is formed on contact region 52a of impurity diffusion region 52 at which contact hole 54 in interlayer insulation layer 53 is located, with a bottom coverage of about 15%.
Next, at step S53 in FIG. 18, the power for titanium target 104 is turned off and, at the same time, argon and nitrogen gases are introduced into apparatus body 100 to form an atmosphere comprising a mixture of argon and nitrogen gases. At step S54, the titanium target 104 is turned on. It should be noted that it takes about 15 seconds from the start of step S53 until flow rate of the nitrogen gas into the inside of the apparatus body 100 becomes stable, and that the argon gas and the nitrogen gas continue to be introduced while the titanium layer 56 is being formed where power is supplied to the titanium target 104.
The titanium target 104 then discharges sputtering particles of titanium, which are converted to sputtering particles of titanium nitride by reaction with nitrogen in the gas mixture. After a large amount of oblique components are removed by collimator 105, the sputtering titanium nitride particles impinge on wafer 102, thereby forming titanium nitride layer 56 on the entire surface of titanium layer 55, as shown in FIG. 12. In about 105 seconds, a titanium nitride layer 56 is formed having a thickness of about 700 .ANG. on the surface of interlayer insulation layer 53, or a flat portion, and having a thickness of about 105 .ANG. on contact region 52a of impurity diffusion region 52 at which contact hole 54 in interlayer insulation layer 53 is located, with a bottom coverage of about 15%.
Next, at step S55, shown in FIG. 18, titanium target 104 is turned off, and shutter 109 is closed, or the shutter 109 is placed between the titanium target 104 and the wafer 104. During this period, the introduction of nitrogen gas is stopped. It took about 15 seconds at step S55 to close the shutter. After shutter 109 is completely closed, at step S56 power is supplied to titanium target 104, thereby discharging sputtering particles of titanium from the titanium target 104. The discharged sputtering titanium particles impinge on and become attached to collimator 105, and to shutter 109 when passed through collimator 105. As a result, titanium functions as an adhesive which prevents the attached titanium nitride from peeling off collimator 105 and, further, attaches to and covers the titanium nitride attached to collimator 105. This cleaning period (step S56) for sputtering titanium, which functions as an adhesive, took about 30 seconds for titanium to cover the attached titanium nitride.
At step S57, shutter 109 is closed and the introduction of the argon gas stopped at the same time, expending about 10 seconds. At this point, the processes for forming titanium layer 56 and titanium nitride layer 56 concludes.
The sequence of manipulative steps depicted in FIG. 18 was conducted to form titanium layer 56 as shown in FIG. 15 on about 500 sheets of wafers 102. The titanium silicide layer 57 formed by heat-treatment was made to have a thickness of about 75 .ANG. and enabled the formation of a low resistance electrical connection between impurity diffusion region 52 and the interconnection layer. The titanium nitride layer 56 prevented films from peeling off when tungsten plug 59 of the interconnection layer is formed, and functioned as an adhesive layer between titanium layer 55 and tungsten layer 58. Titanium nitride layer 56 had a thickness of about 105 .ANG. on contact region 52a of impurity diffusion region 52 at which contact hole 54 in interlayer insulation layer 53 is located, and contributed to preventing the occurrence of warm holes 11 at impurity diffusion region 52 upon formation of tungsten layer 58 by a blanket CVD method using WF.sub.6 gas.
We have found, however, that the above described method depicted in FIG. 18 suffers from certain disadvantages. Specifically, when forming titanium layer 55 and titanium nitride layer 56 using a collimation sputtering apparatus having shutter 109, as described above, no layer can be formed on the wafer during the cleaning period when titanium is sputtered from titanium target 104 while the shutter 109 is closed. Therefore, the capacity of such a collimation sputtering device is significantly reduced. In addition, the method consumes large amounts of titanium, because titanium is sputtered from titanium target 104 during the cleaning period. Moreover, the diameter of the collimator's hole is reduced since titanium is attached thereto even during the cleaning period, thereby increasing the aspect ratio of the collimator early in the process and, consequently, reducing the amount of sputtering particles impinging on wafer 102 early in the process. As a result, it is necessary to shorten the replacement cycle of the collimators. In summary, the collimation sputtering apparatus containing a shutter suffers from lowered capacity and increased costs.